A Top Down Approach to the Formal Specification of SCI Cache Coherence

Scalable Coherent Interface (SCI) is a bus de ned by an IEEE working group. The purpose of SCI is to be the interconnect in future shared memory multiprocessors. The SCI de nition, as proposed by the working group, speci es a cache coherence protocol. This speci cation is given in the C programming language. This report describes a layered approach to the speci cation of this cache coherence protocol. The top layer de nes our most abstract view of the memory system, that is a store without cache. Caches are introduced at the second level. The SCI coherence protocol is directory based, the directory being implemented as a doubly linked list between all caches that contain the same memory entity. In our layered approach to this structure we rst implement the set of caches that share the same memory entity, as a sequence of caches. At the bottom level speci ed in this report the data structure is a set of caches structured in a doubly linked list. Our speci cations are fully applicative, and concurrency is introduced by splitting the high level operations up into more ne grained ones that can interleave.